Analytical optimum

Maximum SNR appears where two ADC errors balance.

Changing the sensing resistance trades clipping against quantization. Their balance reveals the best attainable compute SNR for the selected device and dot-product dimension.

Compute SNR versus sensing resistance, showing a maximum where clipping and quantization noise balance.
ReRAM validation case. For logical N = 512 and a 6-bit ADC, the 10,000-sample behavioral trend follows 1,000 precomputed SPICE samples. Adapted from Fig. 2 of the ISCAS 2022 paper.

How to read the maximum

Improving one error eventually exposes another.

SNRmax occurs where the clipping and quantization noise variances are equal, at Rs = Rs*.

  • Low sensing resistance. The signal grows, but large dot products clip.
  • High sensing resistance. Clipping falls, but quantization noise takes over.
  • Balanced coordinate. Neither ADC error dominates, producing the maximum total SNR.

The behavioral estimate follows 22 nm SPICE simulation, and every trend below uses the behavioral model.

Reproduce this sweep ↗

Maximum SNR trends

Dimension, ADC precision, and contrast each move the maximum.

With Rs = Rs* at every point, the trends below come from Fig. 3 of the paper.

Maximum compute SNR versus dot-product dimension N for FeFET, ReRAM, and MRAM, with MRAM and ReRAM rolling off at large N.
Dot-product dimension. SNRmax versus N for BADC = 6 and Rs,min = 1 kΩ. Adapted from Fig. 3(a) of the ISCAS 2022 paper.

Dot-product dimension

SNRmax rolls off once Rs* reaches its floor.

Rs* falls as N grows. Once it would drop below Rs,min = 1 kΩ, SNRmax rolls off, beyond N ≈ 500 for MRAM and N ≈ 2,000 for ReRAM. FeFET keeps Rs* near 10 kΩ and shows no roll-off.

ADC precision

Past 6 to 7 bits, the ADC is no longer the limit.

MRAM reaches SNRmax with a 6 b ADC, while ReRAM and FeFET need 7 b because their SNRmax is about 5 dB higher. More bits do not help, since DAC mismatch and bitcell variation then dominate.

Maximum compute SNR versus ADC precision, saturating at 6 bits for MRAM and 7 bits for ReRAM and FeFET.
ADC precision. SNRmax versus BADC for N = 512. Adapted from Fig. 3(b) of the ISCAS 2022 paper.
Maximum compute SNR versus resistive contrast for three on-resistance values, rising until a contrast of about 12 and then saturating.
Resistive contrast. SNRmax versus Roff/Ron for N = 512 and BADC = 7, at three values of Ron. Adapted from Fig. 3(c) of the ISCAS 2022 paper.

Resistive contrast

Contrast pays off only up to 12 to 15.

Below this contrast, clipping and quantization dominate and SNRmax improves. Above it, mismatch and variation dominate and SNRmax saturates. The curves overlap for all three Ron values, so FeFET gains little over ReRAM.

Design rules

Three rules follow from the analysis.

1

Balance the ADC errors

Set Rs at Rs*, not at the minimum of either error.

2

Stop chasing contrast

Contrast beyond 12 to 15 buys little SNR.

3

Size the ADC to the device

Use 6 b for MRAM and 7 b for ReRAM and FeFET at N = 512.

Does Rs* also maximize the accuracy of a mapped network?

Check the accuracy evidence